The present invention relates to linearity error correction, and more particularly to a linearity corrector using filter products to reduce, or eliminate, distortion generated by signal processing systems, such as an analog to digital converter (ADC).
Reducing distortion produced by ADCs increases the spurious-free dynamic range (SFDR), which is useful for systems that use ADCs to acquire data, such as spectrum analyzers, and other electronic measurement instruments.
Modern high-speed ADC designs use a deep clock pipeline to help accurately convert an analog input to a sampled digital representation in a series of refining steps. The ADC designers make significant efforts to remove obvious sources of nonlinearities in the analog processing circuits. However, it is typically difficult to remove all sources of errors. Designers tend to remove the most obvious problems of the circuit until computerized modeling, for example SPICE modeling, shows that the converter meets specifications. Linearity can be improved using techniques such as reducing dynamic range at the nonlinear device, or using feedback around it. However, some circuit topologies have inherent distortion mechanisms that cannot be completely removed.
Pipelined processing also provides opportunities for internal digital and analog circuit activity to modulate the processing of internal analog signals. In many such cases, the residual nonlinear distortion is generated by self-modulation of the input signal with a linear function of itself or its own derivative. This results in some lower level distortions that are hard to eliminate. Such modulation could occur via the internal power supply distribution. In this case, the number of circuit paths that can generate voltage modulation on the power supply rails may be quite high. Simulating these effects complicates device modeling, and slows computerized simulations. To first order, these contributions to power supply modulation will add almost linearly, so they can be modeled as a linear finite impulse response (FIR) filter.
At one, or more, points in analog signal processing, modulation occurs, which corresponds to a multiplication. In pipelined ADCs, modulation typically occurs in the high gain analog amplifiers between conversion stages. In this situation, the harmonic and intermodulation distortion is typically characterized by the presence of 2nd and 3rd order distortion terms, with very little higher-order distortion occurring.
Previous proposed solutions have been based on Volterra Filters. The impulse response of ADCs can be many clock periods, for example 64 clock periods may be used. The correcting system using Volterra Filters would require a similar response length. In a 3rd-order distortion Volterra system this results in a filter of on the order of (N3)/6 taps, which for a correcting system having a response length of 64 would result in on the order of about 50,000 taps. A filter system with such a large number of taps is too complex and expensive to implement in a practical system at this time.
Another solution has been proposed elsewhere for use in connection with correcting distortion in loud speakers, which utilizes a filter structure that approximates certain aspects of a Volterra filter. FIG. 1 illustrates a version of this solution having a 1st order correction and a 3rd order correction. The first order compensation is provided by filter 12 (h1). The 3rd order compensation is provided by multiplying the output of filter 14 and the output of filter 16 using the multiplier 18, filtering the output from the multiplier 18 using filter 20, multiplying the output of filter 20 with the output of filter 22 using multiplier 24 and finally filtering the output of the multiplier 24 using filter 26. By summing the output from the first order compensation with the third order compensation using adder 28, a linear cubic compensation may be provided. The 3rd order compensation of the system shown in FIG. 1 implements the following equation,
      y    ⁡          (      n      )        =            ∑              i        =        0                              N          p                -        1              ⁢                            h          p                ⁡                  (          i          )                    ⁢                          ⁢                        ∑                      j            =            0                                              N              a                        +                          N              m                        -            2                          ⁢                                            h              3                        ⁡                          (              j              )                                ⁢                                          ⁢                      x            ⁡                          (                              n                -                i                -                j                            )                                ⁢                                          ⁢                                    ∑                              k                =                0                                                              N                  m                                -                1                                      ⁢                                                            h                  m                                ⁡                                  (                  k                  )                                            ·                                                ∑                                      l                    =                    0                                                                              N                      a                                        -                    1                                                  ⁢                                                                            h                      1                                        ⁡                                          (                      l                      )                                                        ⁢                                                                          ⁢                                      x                    ⁡                                          (                                              n                        -                        l                        -                        k                        -                        i                                            )                                                        ⁢                                                                          ⁢                                                            ∑                                              m                        =                        0                                                                                              N                          a                                                -                        1                                                              ⁢                                                                                            h                          2                                                ⁡                                                  (                          m                          )                                                                    ⁢                                                                                          ⁢                                              x                        ⁡                                                  (                                                      n                            -                            m                            -                            k                            -                            i                                                    )                                                                                                                                                            which is a described as a general 3rd order nonlinear filter structure. This implementation utilizes filter 20 after multiplier 18, and filter 26 after multiplier 24. Once the linear cubic compensation is obtained, it is subtracted from the output of the unknown system that is being compensated. This requires that the corrector have access to the original signal that was input into the unknown system, which is not available where the original signal is not digital. While it may be a useful subcase of a Volterra filter, it has drawbacks that make it unsuitable for systems with a good linear frequency response. The filters following the multipliers cannot distinguish between original components and aliased components caused by the nonlinear effects of the prior multiplications. While additional filtering following the multiplier may provide some correction for frequency-dependent amplitude and phase responses in signal paths, aliasing does not allow the filter to correct for differences in phase and amplitude response between the original and aliased components when used in applications that use most of a Nyquist band.
A remaining problem in linearity compensation systems relates to calibration. These systems may require solving for systems of filter coefficients that are nonlinear with respect to the output. Solving for more coefficients requires more computation for any calibration scheme that can be applied to the system.
The details and improvements over the prior solutions will be discussed in greater detail below.